Luleå University of Technology

Digital Structures on Silicon
SMD099 Digital Kiselkonstruktion

lp3+4 19[97/]98 (lp3: modul 4+; lp4:modul @:@), 8 points

Instructor: to be appointed

Email Address: to be appointed

Examiner: to be appointed

Email Address: to be appointed

Some Stuff for Past (97/98) SMD099

• The "Official" Course Description SMD099
  
  
• the "Official" Course Schedule, (also here)
  
  
  
• Course Outline, Lesson Plans, Slides .
  
  
• Textbooks (Texter).
  
  
• Laboratories and Assignments (See the outline for due dates)
  
  
• Final Exam Study Guide for SMD099
  
  
• Assignment 3 Groups and Abstracts
  
  
• Project Groups and Project Reports
  
  
• Process Technologies and Fab Organizations
  
  
• Querys from some students
  
  
• Course Evaluation Form
  
  
• News Articles of 1998
  
  
• diverse documentation
  
  

  
  
  

  Relationship to Course
  "SMD106 Project in Digital Synthesis"

  This course (SMD099) is given every other year (not to be given 98/99) and deals with "full custom" design of small to large digital circuits directly onto a totally blank silicon surface. This is low-level "VLSI" in which the tools permit the designer to take his computation structure (SMD098 is prerequisite to this course) and translate that topological structure into geometrical structures. The process is something of an artistic exercise. Very high performance circuits can be obtained this way. The focus of this course is to overview the silicon-level mask layer and transistor-level design issues, then to implement a wide range of gates and other logic structures to the point where the student can link high-level design with the underlying hardware structure on silicon. Click to see the outline.

  SMD099 Projects

  As well, SMD099 in this third quarter will lead into a forth quarter project course. Click to see a partial list of potential projects which may be tackled by groups of students.
  
  

  Project in Digital Synthesis SMD106

  "Project in Digital Synthesis" (course scheduled for Spring 98/99) deals with target technologies in which the designer focuses on higher-level descriptions of his circuit's function, relies on synthesis tools to determine a corresponding topological computation structure, and aims this synthesis process towards programmable technologies (not blank silicon) so that the design can be realized in minutes, rather than months. Only limited control over geometry is available in these technologies. The process becomes an exercise is mastering higher and higher levels of abstraction, and of manipulating increasingly powerful design tools. SPW, maybe COSSAP.

  
  

  Do you know about DTEK ?

  Last modified 1998-01-13 by Norm Jantz